Increasing Software Development Productivity with ARM and Synopsys Modeling Solutions
Synopsys

This presentation will illustrate how the combination of ARM and Synopsys system-level modeling solutions jointly enable earlier and more productive software development. It will review the key system-level model requirements for software development, architecture exploration and verification along the eight most often cited customer concerns: model speed, time of availability, accuracy, development cost, bring up cost, debug insight, execution control and system interfaces to the environment. The audience will learn how to use ARM processor-based sub-systems in conjunction with Synopsys DesignWare transaction-level models of connectivity IP like SATA, PCI-e and USB in virtual platforms based on the standard OSCI SystemC TLM-2.0 APIs. Special consideration will be given to building virtual platforms in the context of multi-core and low power design. The ARM System Generator tool creates SystemC TLM-2.0 compliant models of ARM processor sub-systems including processors, PrimeCells and bus models, which can be debugged using the ARM RealView solution. Synopsys provides solutions for complete electronic system virtualization including a library of processors, connectivity and bus models. The combined ARM and Synopsys model portfolio addresses more than 50% of total IP market and in combination with Synopsys Innovator SystemC TLM-2.0 tools for platform creation allows designers to significantly cut their project schedules and to start software development 9 to 12 months prior to silicon availability.

Frank Schirrmeister, Director, Product Marketing
As Director, Product Management at Synopsys, Inc., Frank Schirrmeister is responsible for the System-Level Solutions products Innovator, DesignWare System-Level Library and System Studio with a focus on virtual platforms for early software development. Prior to joining Synopsys, Frank held senior management positions at Imperas, ChipVision, Cadence, AXYS Design Automation and SICAN Microelectronics. Most recently he served as VP of Marketing at Imperas, a provider of solutions for multicore software development. At Cadence he served as Group Director of Verification Marketing in the Design and Verification Business Unit and was instrumental in market introduction and proliferation of innovative products like Virtual Component Co-Design, Verification Cockpit and Incisive.